EDN

Adaptive resolution for ADCs

Engineers always want to get all they can from their circuits; this holds for analog-to-digital converters (ADCs). To maximize performance from an ADC, resolution is perhaps the primary spec to focus ...
EDN

Simple speedy single-slope ADC

A simple, speedy single-slope ADC with a biphasic conversion cycle and a decent accuracy. Read on to learn more!
Electronic Design

ADC Makers Challenge Conventional Wisdom About SAR Speed And Resolution

This file type includes high resolution graphics and schematics when applicable. 2013 has been a remarkable year for performance improvements in successive-approximation architecture (SAR) ...
Embedded

Using input-referred noise to improve analog-to-digital converter resolution

All analog-to-digital converters (ADCs) have a certain amount ofinput-referred noise. In most cases,less input noise is better. There are some cases, however, where inputnoise can actually be helpful ...
Embedded

Leveraging FPGA and CPLD digital logic to implement analog to digital converters

Designers of digital systems are familiar with implementing the 'leftovers' of their digital design by using FPGAs and CPLDs to glue together various processors, memories, and standard function ...