Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.

If only we’d been taught the tricks associated with the asynchronous domain, we could have run wild and free; instead, we were condemned to serve the rules of the synchronous realm. In my previous ...

Wire delay is beginning to dominate gate delay in current CMOS technologies. According to Moore’s Law by 2016 CMOS feature size should be on the order of 22 nm with clock frequencies reaching around ...